Espressif Systems /ESP32-H2 /RMT /SYS_CONF

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Interpret as SYS_CONF

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (APB_FIFO_MASK)APB_FIFO_MASK 0 (MEM_CLK_FORCE_ON)MEM_CLK_FORCE_ON 0 (MEM_FORCE_PD)MEM_FORCE_PD 0 (MEM_FORCE_PU)MEM_FORCE_PU 0SCLK_DIV_NUM0SCLK_DIV_A0SCLK_DIV_B0SCLK_SEL 0 (SCLK_ACTIVE)SCLK_ACTIVE 0 (CLK_EN)CLK_EN

Description

RMT apb configuration register

Fields

APB_FIFO_MASK

1’h1: access memory directly. 1’h0: access memory by FIFO.

MEM_CLK_FORCE_ON

Set this bit to enable the clock for RMT memory.

MEM_FORCE_PD

Set this bit to power down RMT memory.

MEM_FORCE_PU

1: Disable RMT memory light sleep power down function. 0: Power down RMT memory when RMT is in light sleep mode.

SCLK_DIV_NUM

the integral part of the fractional divisor

SCLK_DIV_A

the numerator of the fractional part of the fractional divisor

SCLK_DIV_B

the denominator of the fractional part of the fractional divisor

SCLK_SEL

choose the clock source of rmt_sclk. 1:CLK_80Mhz,2:CLK_FOSC, 3:XTAL

SCLK_ACTIVE

rmt_sclk switch

CLK_EN

RMT register clock gate enable signal. 1: Power up the drive clock of registers. 0: Power down the drive clock of registers

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